ASIC Digital Design, Sr Staff · Bengaluru

Synopsys is a global leader in electronic design automation (EDA) and semiconductor IP, powering innovations from silicon to software.

Key Responsibilities

• Lead ASIC digital design and verification architecture for high-performance DDR IP modules.
• Develop comprehensive verification test plans based on protocol specifications and architectural requirements.
• Build and maintain robust SystemVerilog and UVM-based testbenches and verification environments.
• Execute functional, structural, and timing verification to ensure complete test coverage.
• Perform constrain-random testing, functional coverage, and code coverage analysis.
• Identify, isolate, and debug complex RTL and testbench bugs across simulation runs.
• Define and track verification metrics to ensure tape-out readiness and first-pass silicon success.
• Collaborate with digital design, architecture, and post-silicon validation teams.
• Review verification test plans and coach junior and mid-level verification engineers.
• Automate regression test suites and continuous integration pipelines using scripting languages.
• Optimize testbench performance and simulation execution cycles for turnaround efficiency.